Код: Выделить всё
#define MIN_LIMIT_PORT_0 E
#define MIN_LIMIT_PORT_1 J
#define MIN_LIMIT_PORT_2 D
#if N_AXIS > 3
#define MIN_LIMIT_PORT_3 E
#endif
#if N_AXIS > 4
#define MIN_LIMIT_PORT_4 J
#endif
#if N_AXIS > 5
#define MIN_LIMIT_PORT_5 F // (Ramps Aux-1 D57)
#endif
#define MIN_LIMIT_BIT_0 5 // X Limit Min - Pin D3
#define MIN_LIMIT_BIT_1 1 // Y Limit Min - Pin D14
#define MIN_LIMIT_BIT_2 3 // Z Limit Min - Pin D18
#if N_AXIS > 3
#define MIN_LIMIT_BIT_3 4 // Axis number 4 : RAMPS AUX2 pin D42
#endif
#if N_AXIS > 4
#define MIN_LIMIT_BIT_4 0 // Axis number 5 : RAMPS AUX2 pin D44
#endif
#if N_AXIS > 5
#define MIN_LIMIT_BIT_5 3 // Axis number 6 : RAMPS AUX2 pin D57
#endif
#define _MIN_LIMIT_BIT(i) MIN_LIMIT_BIT_##i
#define MIN_LIMIT_BIT(i) _MIN_LIMIT_BIT(i)
#define MIN_LIMIT_DDR(i) _DDR(MIN_LIMIT_PORT_##i)
#define MIN_LIMIT_PORT(i) _PORT(MIN_LIMIT_PORT_##i)
#define MIN_LIMIT_PIN(i) _PIN(MIN_LIMIT_PORT_##i)
#define MAX_LIMIT_PORT_0 E
#define MAX_LIMIT_PORT_1 J
#define MAX_LIMIT_PORT_2 D
#if N_AXIS > 3
#define MAX_LIMIT_PORT_3 G
#endif
#if N_AXIS > 4
#define MAX_LIMIT_PORT_4 F
#endif
#if N_AXIS > 5
#define MAX_LIMIT_PORT_5 F // (Ramps Aux-3 D58)
#endif
#define MAX_LIMIT_BIT_0 7 // X Limit Max - Pin D2
#define MAX_LIMIT_BIT_1 5 // Y Limit Max - Pin D15
#define MAX_LIMIT_BIT_2 2 // Z Limit Max - Pin D19
#if N_AXIS > 3
#define MAX_LIMIT_BIT_3 1 // Axis number 4 : RAMPS AUX2 pin D40
#endif
#if N_AXIS > 4
#define MAX_LIMIT_BIT_4 5 // Axis number 5 : RAMPS AUX2 pin D59
#endif
#if N_AXIS > 5
#define MAX_LIMIT_BIT_5 4 // Axis number 6 : RAMPS AUX2 pin D58
#endif
#define _MAX_LIMIT_BIT(i) MAX_LIMIT_BIT_##i
#define MAX_LIMIT_BIT(i) _MAX_LIMIT_BIT(i)
#define MAX_LIMIT_DDR(i) _DDR(MAX_LIMIT_PORT_##i)
#define MAX_LIMIT_PORT(i) _PORT(MAX_LIMIT_PORT_##i)
#define MAX_LIMIT_PIN(i) _PIN(MAX_LIMIT_PORT_##i)