это тоже самое, что накормить голодного, но не научить добывать еду.
Я тоже впервые связался с этим на прошлой неделе, поэтому и подсказал что мог - в рамках "приличия", а дальше сами пользуйтесь головой и подсказками.
Это ваше мнение, не более. Я не кормлю с ложечки, я показываю как это делается. Т.е. даю пример.xenon-alien писал(а): ↑09 сен 2023, 17:06это тоже самое, что накормить голодного, но не научить добывать еду.
Вы готовы с ложечки накормить - это ваше дело. Но потом не удивляйтесь, что это станет обыденностью. Вы сами приучили к этому человека.
Вот этого я просто не пойму, если человек не заинтересован самим разобраться, то зачем это вам? (вопрос риторический)
Я в личке много кому помог и подсказал абсолютно бескорыстно. И не только на этом форуме. (по мере моих "скудных" знаний)
Моя система ценностей - проект Венера, от Жака Фреско, но увы...
Код: Выделить всё
halcmd: loadrt trivkins
Note: Using POSIX realtime
halcmd: loadrt motmod servo_period_nsec=1000000 num_joints=3
halcmd: loadrt hostmot2
hm2: loading Mesa HostMot2 driver version 0.15
halcmd: loadrt hm2_pci
hm2_pci: loading Mesa AnyIO HostMot2 driver version 0.7
hm2_pci: discovered 5i25 at 0000:01:00.0
hm2/hm2_5i25.0: Low Level init 0.15
hm2/hm2_5i25.0: Smart Serial Firmware Version 43
Board hm2_5i25.0.7i66.0.0 Hardware Mode 0 = standard
Board hm2_5i25.0.7i66.0.0 Software Mode 0 = input_output
Board hm2_5i25.0.7i66.0.0 Software Mode 1 = input_analog_output
Board hm2_5i25.0.7i66.0.0 Software Mode 2 = input_analog_fieldvoltage_output
hm2/hm2_5i25.0: Warning: sserial remote device 7i66 channel 0 has old firmware that should be updated
hm2/hm2_5i25.0: 34 I/O Pins used:
hm2/hm2_5i25.0: IO Pin 000 (P3-01): StepGen #0, pin Direction (Output)
hm2/hm2_5i25.0: IO Pin 001 (P3-14): StepGen #0, pin Step (Output)
hm2/hm2_5i25.0: IO Pin 002 (P3-02): StepGen #1, pin Direction (Output)
hm2/hm2_5i25.0: IO Pin 003 (P3-15): StepGen #1, pin Step (Output)
hm2/hm2_5i25.0: IO Pin 004 (P3-03): StepGen #2, pin Direction (Output)
hm2/hm2_5i25.0: IO Pin 005 (P3-16): StepGen #2, pin Step (Output)
hm2/hm2_5i25.0: IO Pin 006 (P3-04): StepGen #3, pin Direction (Output)
hm2/hm2_5i25.0: IO Pin 007 (P3-17): StepGen #3, pin Step (Output)
hm2/hm2_5i25.0: IO Pin 008 (P3-05): PWMGen #0, pin Out0 (PWM or Up) (Output)
hm2/hm2_5i25.0: IO Pin 009 (P3-06): PWMGen #0, pin Not-Enable (Output)
hm2/hm2_5i25.0: IO Pin 010 (P3-07): PWMGen #0, pin Out1 (Dir or Down) (Output)
hm2/hm2_5i25.0: IO Pin 011 (P3-08): Smart Serial Interface #0, pin tx0 (Output)
hm2/hm2_5i25.0: IO Pin 012 (P3-09): Smart Serial Interface #0, pin txen0 (Output)
hm2/hm2_5i25.0: IO Pin 013 (P3-10): Smart Serial Interface #0, pin rx0 (Input)
hm2/hm2_5i25.0: IO Pin 014 (P3-11): Encoder #0, pin Index (Input)
hm2/hm2_5i25.0: IO Pin 015 (P3-12): Encoder #0, pin B (Input)
hm2/hm2_5i25.0: IO Pin 016 (P3-13): Encoder #0, pin A (Input)
hm2/hm2_5i25.0: IO Pin 017 (P2-01): StepGen #4, pin Direction (Output)
hm2/hm2_5i25.0: IO Pin 018 (P2-14): StepGen #4, pin Step (Output)
hm2/hm2_5i25.0: IO Pin 019 (P2-02): StepGen #5, pin Direction (Output)
hm2/hm2_5i25.0: IO Pin 020 (P2-15): StepGen #5, pin Step (Output)
hm2/hm2_5i25.0: IO Pin 021 (P2-03): StepGen #6, pin Direction (Output)
hm2/hm2_5i25.0: IO Pin 022 (P2-16): StepGen #6, pin Step (Output)
hm2/hm2_5i25.0: IO Pin 023 (P2-04): StepGen #7, pin Direction (Output)
hm2/hm2_5i25.0: IO Pin 024 (P2-17): StepGen #7, pin Step (Output)
hm2/hm2_5i25.0: IO Pin 025 (P2-05): PWMGen #1, pin Out0 (PWM or Up) (Output)
hm2/hm2_5i25.0: IO Pin 026 (P2-06): PWMGen #1, pin Not-Enable (Output)
hm2/hm2_5i25.0: IO Pin 027 (P2-07): PWMGen #1, pin Out1 (Dir or Down) (Output)
hm2/hm2_5i25.0: IO Pin 028 (P2-08): IOPort
hm2/hm2_5i25.0: IO Pin 029 (P2-09): IOPort
hm2/hm2_5i25.0: IO Pin 030 (P2-10): IOPort
hm2/hm2_5i25.0: IO Pin 031 (P2-11): Encoder #1, pin Index (Input)
hm2/hm2_5i25.0: IO Pin 032 (P2-12): Encoder #1, pin B (Input)
hm2/hm2_5i25.0: IO Pin 033 (P2-13): Encoder #1, pin A (Input)
hm2/hm2_5i25.0: registered
hm2_5i25.0: initialized AnyIO board at 0000:01:00.0
halcmd: show all hm2
Loaded HAL Components:
ID Type Name PID State
14 RT hm2_pci ready
Component Pins:
Owner Type Dir Value Name
14 s32 OUT 0 hm2_5i25.0.0.debug
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-00
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-00-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-01
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-01-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-02
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-02-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-03
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-03-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-04
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-04-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-05
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-05-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-06
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-06-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-07
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-07-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-08
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-08-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-09
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-09-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-10
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-10-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-11
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-11-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-12
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-12-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-13
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-13-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-14
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-14-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-15
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-15-not
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-00
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-01
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-02
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-03
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-04
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-05
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-06
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-07
14 s32 OUT 0 hm2_5i25.0.encoder.00.count
14 s32 OUT 0 hm2_5i25.0.encoder.00.count-latched
14 bit I/O FALSE hm2_5i25.0.encoder.00.index-enable
14 bit OUT FALSE hm2_5i25.0.encoder.00.input-a
14 bit OUT FALSE hm2_5i25.0.encoder.00.input-b
14 bit OUT TRUE hm2_5i25.0.encoder.00.input-index
14 bit IN FALSE hm2_5i25.0.encoder.00.latch-enable
14 bit IN FALSE hm2_5i25.0.encoder.00.latch-polarity
14 float OUT 0 hm2_5i25.0.encoder.00.position
14 float OUT 0 hm2_5i25.0.encoder.00.position-latched
14 bit OUT FALSE hm2_5i25.0.encoder.00.quad-error
14 bit IN FALSE hm2_5i25.0.encoder.00.quad-error-enable
14 s32 OUT 0 hm2_5i25.0.encoder.00.rawcounts
14 s32 OUT 0 hm2_5i25.0.encoder.00.rawlatch
14 bit IN FALSE hm2_5i25.0.encoder.00.reset
14 float OUT 0 hm2_5i25.0.encoder.00.velocity
14 float OUT 0 hm2_5i25.0.encoder.00.velocity-rpm
14 s32 OUT 0 hm2_5i25.0.encoder.01.count
14 s32 OUT 0 hm2_5i25.0.encoder.01.count-latched
14 bit I/O FALSE hm2_5i25.0.encoder.01.index-enable
14 bit OUT TRUE hm2_5i25.0.encoder.01.input-a
14 bit OUT TRUE hm2_5i25.0.encoder.01.input-b
14 bit OUT FALSE hm2_5i25.0.encoder.01.input-index
14 bit IN FALSE hm2_5i25.0.encoder.01.latch-enable
14 bit IN FALSE hm2_5i25.0.encoder.01.latch-polarity
14 float OUT 0 hm2_5i25.0.encoder.01.position
14 float OUT 0 hm2_5i25.0.encoder.01.position-latched
14 bit OUT FALSE hm2_5i25.0.encoder.01.quad-error
14 bit IN FALSE hm2_5i25.0.encoder.01.quad-error-enable
14 s32 OUT 0 hm2_5i25.0.encoder.01.rawcounts
14 s32 OUT 0 hm2_5i25.0.encoder.01.rawlatch
14 bit IN FALSE hm2_5i25.0.encoder.01.reset
14 float OUT 0 hm2_5i25.0.encoder.01.velocity
14 float OUT 0 hm2_5i25.0.encoder.01.velocity-rpm
14 bit IN FALSE hm2_5i25.0.encoder.hires-timestamp
14 u32 IN 0x00001FC8 hm2_5i25.0.encoder.sample-frequency
14 bit OUT TRUE hm2_5i25.0.gpio.000.in
14 bit OUT FALSE hm2_5i25.0.gpio.000.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.001.in
14 bit OUT FALSE hm2_5i25.0.gpio.001.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.002.in
14 bit OUT FALSE hm2_5i25.0.gpio.002.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.003.in
14 bit OUT FALSE hm2_5i25.0.gpio.003.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.004.in
14 bit OUT FALSE hm2_5i25.0.gpio.004.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.005.in
14 bit OUT FALSE hm2_5i25.0.gpio.005.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.006.in
14 bit OUT FALSE hm2_5i25.0.gpio.006.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.007.in
14 bit OUT FALSE hm2_5i25.0.gpio.007.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.008.in
14 bit OUT FALSE hm2_5i25.0.gpio.008.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.009.in
14 bit OUT FALSE hm2_5i25.0.gpio.009.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.010.in
14 bit OUT FALSE hm2_5i25.0.gpio.010.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.011.in
14 bit OUT FALSE hm2_5i25.0.gpio.011.in_not
14 bit OUT FALSE hm2_5i25.0.gpio.012.in
14 bit OUT TRUE hm2_5i25.0.gpio.012.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.013.in
14 bit OUT FALSE hm2_5i25.0.gpio.013.in_not
14 bit OUT FALSE hm2_5i25.0.gpio.014.in
14 bit OUT TRUE hm2_5i25.0.gpio.014.in_not
14 bit OUT FALSE hm2_5i25.0.gpio.015.in
14 bit OUT TRUE hm2_5i25.0.gpio.015.in_not
14 bit OUT FALSE hm2_5i25.0.gpio.016.in
14 bit OUT TRUE hm2_5i25.0.gpio.016.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.017.in
14 bit OUT FALSE hm2_5i25.0.gpio.017.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.018.in
14 bit OUT FALSE hm2_5i25.0.gpio.018.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.019.in
14 bit OUT FALSE hm2_5i25.0.gpio.019.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.020.in
14 bit OUT FALSE hm2_5i25.0.gpio.020.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.021.in
14 bit OUT FALSE hm2_5i25.0.gpio.021.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.022.in
14 bit OUT FALSE hm2_5i25.0.gpio.022.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.023.in
14 bit OUT FALSE hm2_5i25.0.gpio.023.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.024.in
14 bit OUT FALSE hm2_5i25.0.gpio.024.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.025.in
14 bit OUT FALSE hm2_5i25.0.gpio.025.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.026.in
14 bit OUT FALSE hm2_5i25.0.gpio.026.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.027.in
14 bit OUT FALSE hm2_5i25.0.gpio.027.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.028.in
14 bit OUT FALSE hm2_5i25.0.gpio.028.in_not
14 bit IN FALSE hm2_5i25.0.gpio.028.out
14 bit OUT TRUE hm2_5i25.0.gpio.029.in
14 bit OUT FALSE hm2_5i25.0.gpio.029.in_not
14 bit IN FALSE hm2_5i25.0.gpio.029.out
14 bit OUT TRUE hm2_5i25.0.gpio.030.in
14 bit OUT FALSE hm2_5i25.0.gpio.030.in_not
14 bit IN FALSE hm2_5i25.0.gpio.030.out
14 bit OUT TRUE hm2_5i25.0.gpio.031.in
14 bit OUT FALSE hm2_5i25.0.gpio.031.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.032.in
14 bit OUT FALSE hm2_5i25.0.gpio.032.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.033.in
14 bit OUT FALSE hm2_5i25.0.gpio.033.in_not
14 bit IN FALSE hm2_5i25.0.led.CR01
14 bit IN FALSE hm2_5i25.0.led.CR02
14 bit IN FALSE hm2_5i25.0.pwmgen.00.enable
14 float IN 0 hm2_5i25.0.pwmgen.00.value
14 bit IN FALSE hm2_5i25.0.pwmgen.01.enable
14 float IN 0 hm2_5i25.0.pwmgen.01.value
14 s32 OUT 0 hm2_5i25.0.read.time
14 s32 OUT 0 hm2_5i25.0.read_gpio.time
14 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.fault-count
14 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state
14 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state2
14 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state3
14 bit IN TRUE hm2_5i25.0.sserial.port-0.run
14 bit IN FALSE hm2_5i25.0.stepgen.00.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.00.counts
14 float OUT 0 hm2_5i25.0.stepgen.00.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.00.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.00.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.00.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.00.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.00.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.00.enable
14 float IN 0 hm2_5i25.0.stepgen.00.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.00.position-fb
14 float IN 0 hm2_5i25.0.stepgen.00.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.00.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.01.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.01.counts
14 float OUT 0 hm2_5i25.0.stepgen.01.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.01.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.01.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.01.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.01.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.01.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.01.enable
14 float IN 0 hm2_5i25.0.stepgen.01.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.01.position-fb
14 float IN 0 hm2_5i25.0.stepgen.01.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.01.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.02.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.02.counts
14 float OUT 0 hm2_5i25.0.stepgen.02.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.02.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.02.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.02.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.02.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.02.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.02.enable
14 float IN 0 hm2_5i25.0.stepgen.02.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.02.position-fb
14 float IN 0 hm2_5i25.0.stepgen.02.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.02.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.03.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.03.counts
14 float OUT 0 hm2_5i25.0.stepgen.03.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.03.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.03.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.03.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.03.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.03.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.03.enable
14 float IN 0 hm2_5i25.0.stepgen.03.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.03.position-fb
14 float IN 0 hm2_5i25.0.stepgen.03.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.03.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.04.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.04.counts
14 float OUT 0 hm2_5i25.0.stepgen.04.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.04.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.04.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.04.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.04.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.04.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.04.enable
14 float IN 0 hm2_5i25.0.stepgen.04.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.04.position-fb
14 float IN 0 hm2_5i25.0.stepgen.04.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.04.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.05.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.05.counts
14 float OUT 0 hm2_5i25.0.stepgen.05.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.05.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.05.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.05.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.05.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.05.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.05.enable
14 float IN 0 hm2_5i25.0.stepgen.05.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.05.position-fb
14 float IN 0 hm2_5i25.0.stepgen.05.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.05.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.06.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.06.counts
14 float OUT 0 hm2_5i25.0.stepgen.06.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.06.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.06.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.06.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.06.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.06.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.06.enable
14 float IN 0 hm2_5i25.0.stepgen.06.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.06.position-fb
14 float IN 0 hm2_5i25.0.stepgen.06.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.06.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.07.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.07.counts
14 float OUT 0 hm2_5i25.0.stepgen.07.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.07.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.07.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.07.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.07.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.07.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.07.enable
14 float IN 0 hm2_5i25.0.stepgen.07.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.07.position-fb
14 float IN 0 hm2_5i25.0.stepgen.07.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.07.velocity-fb
14 bit I/O FALSE hm2_5i25.0.watchdog.has_bit
14 s32 OUT 0 hm2_5i25.0.write.time
14 s32 OUT 0 hm2_5i25.0.write_gpio.time
Pin Aliases:
Alias Original Name
Signals:
Type Value Name (linked to)
Parameters:
Owner Type Dir Value Name
14 u32 RO 0x00000000 hm2_5i25.0.7i66.0.0.analog0
14 u32 RO 0x00000000 hm2_5i25.0.7i66.0.0.analog1
14 u32 RO 0x00000000 hm2_5i25.0.7i66.0.0.analog2
14 u32 RO 0x00000000 hm2_5i25.0.7i66.0.0.analog3
14 u32 RO 0x76543210 hm2_5i25.0.7i66.0.0.biggercookie
14 u32 RO 0x00005540 hm2_5i25.0.7i66.0.0.fieldvoltage
14 u32 RW 0x00000009 hm2_5i25.0.7i66.0.0.nvbaudrate
14 u32 RO 0x14000002 hm2_5i25.0.7i66.0.0.nvunitnumber
14 u32 RW 0x00000032 hm2_5i25.0.7i66.0.0.nvwatchdogtimeout
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-00-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-01-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-02-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-03-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-04-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-05-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-06-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-07-invert
14 u32 RO 0x0000000A hm2_5i25.0.7i66.0.0.swrevision
14 bit RW FALSE hm2_5i25.0.encoder.00.counter-mode
14 bit RW TRUE hm2_5i25.0.encoder.00.filter
14 bit RW FALSE hm2_5i25.0.encoder.00.index-invert
14 bit RW FALSE hm2_5i25.0.encoder.00.index-mask
14 bit RW FALSE hm2_5i25.0.encoder.00.index-mask-invert
14 float RW 1 hm2_5i25.0.encoder.00.scale
14 float RW 0.5 hm2_5i25.0.encoder.00.vel-timeout
14 bit RW FALSE hm2_5i25.0.encoder.01.counter-mode
14 bit RW TRUE hm2_5i25.0.encoder.01.filter
14 bit RW FALSE hm2_5i25.0.encoder.01.index-invert
14 bit RW FALSE hm2_5i25.0.encoder.01.index-mask
14 bit RW FALSE hm2_5i25.0.encoder.01.index-mask-invert
14 float RW 1 hm2_5i25.0.encoder.01.scale
14 float RW 0.5 hm2_5i25.0.encoder.01.vel-timeout
14 bit RW FALSE hm2_5i25.0.gpio.028.invert_output
14 bit RW FALSE hm2_5i25.0.gpio.028.is_opendrain
14 bit RW FALSE hm2_5i25.0.gpio.028.is_output
14 bit RW FALSE hm2_5i25.0.gpio.029.invert_output
14 bit RW FALSE hm2_5i25.0.gpio.029.is_opendrain
14 bit RW FALSE hm2_5i25.0.gpio.029.is_output
14 bit RW FALSE hm2_5i25.0.gpio.030.invert_output
14 bit RW FALSE hm2_5i25.0.gpio.030.is_opendrain
14 bit RW FALSE hm2_5i25.0.gpio.030.is_output
14 bit RW FALSE hm2_5i25.0.io_error
14 bit RW FALSE hm2_5i25.0.pwmgen.00.enable.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.00.enable.is_opendrain
14 bit RW FALSE hm2_5i25.0.pwmgen.00.offset-mode
14 bit RW FALSE hm2_5i25.0.pwmgen.00.out0.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.00.out0.is_opendrain
14 bit RW FALSE hm2_5i25.0.pwmgen.00.out1.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.00.out1.is_opendrain
14 s32 RW 1 hm2_5i25.0.pwmgen.00.output-type
14 float RW 1 hm2_5i25.0.pwmgen.00.scale
14 bit RW FALSE hm2_5i25.0.pwmgen.01.enable.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.01.enable.is_opendrain
14 bit RW FALSE hm2_5i25.0.pwmgen.01.offset-mode
14 bit RW FALSE hm2_5i25.0.pwmgen.01.out0.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.01.out0.is_opendrain
14 bit RW FALSE hm2_5i25.0.pwmgen.01.out1.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.01.out1.is_opendrain
14 s32 RW 1 hm2_5i25.0.pwmgen.01.output-type
14 float RW 1 hm2_5i25.0.pwmgen.01.scale
14 u32 RW 0x00004E20 hm2_5i25.0.pwmgen.pdm_frequency
14 u32 RW 0x00004E20 hm2_5i25.0.pwmgen.pwm_frequency
14 s32 RW 0 hm2_5i25.0.read.tmax
14 bit RO FALSE hm2_5i25.0.read.tmax-increased
14 s32 RW 0 hm2_5i25.0.read_gpio.tmax
14 bit RO FALSE hm2_5i25.0.read_gpio.tmax-increased
14 bit RW FALSE hm2_5i25.0.sserial.00.tx0.invert_output
14 bit RW FALSE hm2_5i25.0.sserial.00.tx0.is_opendrain
14 bit RW FALSE hm2_5i25.0.sserial.00.txen0.invert_output
14 bit RW FALSE hm2_5i25.0.sserial.00.txen0.is_opendrain
14 u32 RW 0x00000001 hm2_5i25.0.sserial.port-0.fault-dec
14 u32 RW 0x0000000A hm2_5i25.0.sserial.port-0.fault-inc
14 u32 RW 0x000000C8 hm2_5i25.0.sserial.port-0.fault-lim
14 bit RW FALSE hm2_5i25.0.stepgen.00.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.00.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.00.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.00.maxvel
14 float RW 1 hm2_5i25.0.stepgen.00.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.00.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.00.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.01.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.01.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.01.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.01.maxvel
14 float RW 1 hm2_5i25.0.stepgen.01.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.01.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.01.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.02.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.02.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.02.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.02.maxvel
14 float RW 1 hm2_5i25.0.stepgen.02.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.02.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.02.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.03.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.03.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.03.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.03.maxvel
14 float RW 1 hm2_5i25.0.stepgen.03.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.03.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.03.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.04.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.04.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.04.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.04.maxvel
14 float RW 1 hm2_5i25.0.stepgen.04.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.04.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.04.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.05.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.05.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.05.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.05.maxvel
14 float RW 1 hm2_5i25.0.stepgen.05.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.05.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.05.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.06.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.06.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.06.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.06.maxvel
14 float RW 1 hm2_5i25.0.stepgen.06.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.06.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.06.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.07.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.07.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.07.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.07.maxvel
14 float RW 1 hm2_5i25.0.stepgen.07.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.07.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.07.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-3
14 u32 RW 0x004C4B40 hm2_5i25.0.watchdog.timeout_ns
14 s32 RW 0 hm2_5i25.0.write.tmax
14 bit RO FALSE hm2_5i25.0.write.tmax-increased
14 s32 RW 0 hm2_5i25.0.write_gpio.tmax
14 bit RO FALSE hm2_5i25.0.write_gpio.tmax-increased
Parameter Aliases:
Alias Original Name
hm2_5i25.0.pwmgen.00.enable.invert_output hm2_5i25.0.gpio.009.invert_output
hm2_5i25.0.pwmgen.00.enable.is_opendrain hm2_5i25.0.gpio.009.is_opendrain
hm2_5i25.0.pwmgen.00.out0.invert_output hm2_5i25.0.gpio.008.invert_output
hm2_5i25.0.pwmgen.00.out0.is_opendrain hm2_5i25.0.gpio.008.is_opendrain
hm2_5i25.0.pwmgen.00.out1.invert_output hm2_5i25.0.gpio.010.invert_output
hm2_5i25.0.pwmgen.00.out1.is_opendrain hm2_5i25.0.gpio.010.is_opendrain
hm2_5i25.0.pwmgen.01.enable.invert_output hm2_5i25.0.gpio.026.invert_output
hm2_5i25.0.pwmgen.01.enable.is_opendrain hm2_5i25.0.gpio.026.is_opendrain
hm2_5i25.0.pwmgen.01.out0.invert_output hm2_5i25.0.gpio.025.invert_output
hm2_5i25.0.pwmgen.01.out0.is_opendrain hm2_5i25.0.gpio.025.is_opendrain
hm2_5i25.0.pwmgen.01.out1.invert_output hm2_5i25.0.gpio.027.invert_output
hm2_5i25.0.pwmgen.01.out1.is_opendrain hm2_5i25.0.gpio.027.is_opendrain
hm2_5i25.0.sserial.00.tx0.invert_output hm2_5i25.0.gpio.011.invert_output
hm2_5i25.0.sserial.00.tx0.is_opendrain hm2_5i25.0.gpio.011.is_opendrain
hm2_5i25.0.sserial.00.txen0.invert_output hm2_5i25.0.gpio.012.invert_output
hm2_5i25.0.sserial.00.txen0.is_opendrain hm2_5i25.0.gpio.012.is_opendrain
hm2_5i25.0.stepgen.00.direction.invert_output hm2_5i25.0.gpio.000.invert_output
hm2_5i25.0.stepgen.00.direction.is_opendrain hm2_5i25.0.gpio.000.is_opendrain
hm2_5i25.0.stepgen.00.step.invert_output hm2_5i25.0.gpio.001.invert_output
hm2_5i25.0.stepgen.00.step.is_opendrain hm2_5i25.0.gpio.001.is_opendrain
hm2_5i25.0.stepgen.01.direction.invert_output hm2_5i25.0.gpio.002.invert_output
hm2_5i25.0.stepgen.01.direction.is_opendrain hm2_5i25.0.gpio.002.is_opendrain
hm2_5i25.0.stepgen.01.step.invert_output hm2_5i25.0.gpio.003.invert_output
hm2_5i25.0.stepgen.01.step.is_opendrain hm2_5i25.0.gpio.003.is_opendrain
hm2_5i25.0.stepgen.02.direction.invert_output hm2_5i25.0.gpio.004.invert_output
hm2_5i25.0.stepgen.02.direction.is_opendrain hm2_5i25.0.gpio.004.is_opendrain
hm2_5i25.0.stepgen.02.step.invert_output hm2_5i25.0.gpio.005.invert_output
hm2_5i25.0.stepgen.02.step.is_opendrain hm2_5i25.0.gpio.005.is_opendrain
hm2_5i25.0.stepgen.03.direction.invert_output hm2_5i25.0.gpio.006.invert_output
hm2_5i25.0.stepgen.03.direction.is_opendrain hm2_5i25.0.gpio.006.is_opendrain
hm2_5i25.0.stepgen.03.step.invert_output hm2_5i25.0.gpio.007.invert_output
hm2_5i25.0.stepgen.03.step.is_opendrain hm2_5i25.0.gpio.007.is_opendrain
hm2_5i25.0.stepgen.04.direction.invert_output hm2_5i25.0.gpio.017.invert_output
hm2_5i25.0.stepgen.04.direction.is_opendrain hm2_5i25.0.gpio.017.is_opendrain
hm2_5i25.0.stepgen.04.step.invert_output hm2_5i25.0.gpio.018.invert_output
hm2_5i25.0.stepgen.04.step.is_opendrain hm2_5i25.0.gpio.018.is_opendrain
hm2_5i25.0.stepgen.05.direction.invert_output hm2_5i25.0.gpio.019.invert_output
hm2_5i25.0.stepgen.05.direction.is_opendrain hm2_5i25.0.gpio.019.is_opendrain
hm2_5i25.0.stepgen.05.step.invert_output hm2_5i25.0.gpio.020.invert_output
hm2_5i25.0.stepgen.05.step.is_opendrain hm2_5i25.0.gpio.020.is_opendrain
hm2_5i25.0.stepgen.06.direction.invert_output hm2_5i25.0.gpio.021.invert_output
hm2_5i25.0.stepgen.06.direction.is_opendrain hm2_5i25.0.gpio.021.is_opendrain
hm2_5i25.0.stepgen.06.step.invert_output hm2_5i25.0.gpio.022.invert_output
hm2_5i25.0.stepgen.06.step.is_opendrain hm2_5i25.0.gpio.022.is_opendrain
hm2_5i25.0.stepgen.07.direction.invert_output hm2_5i25.0.gpio.023.invert_output
hm2_5i25.0.stepgen.07.direction.is_opendrain hm2_5i25.0.gpio.023.is_opendrain
hm2_5i25.0.stepgen.07.step.invert_output hm2_5i25.0.gpio.024.invert_output
hm2_5i25.0.stepgen.07.step.is_opendrain hm2_5i25.0.gpio.024.is_opendrain
Exported Functions:
Owner CodeAddr Arg FP Users Name
00014 7ff51dc678b5 55713968ba70 YES 0 hm2_5i25.0.read
00014 7ff51dc67606 55713968ba70 YES 0 hm2_5i25.0.read_gpio
00014 7ff51dc67709 55713968ba70 YES 0 hm2_5i25.0.write
00014 7ff51dc676d4 55713968ba70 YES 0 hm2_5i25.0.write_gpio
Realtime Threads:
Period FP Name ( Time, Max-Time )Код: Выделить всё
Component Pins:
Owner Type Dir Value Name
14 s32 OUT 0 hm2_5i25.0.0.debug
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-00
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-00-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-01
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-01-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-02
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-02-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-03
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-03-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-04
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-04-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-05
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-05-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-06
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-06-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-07
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-07-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-08
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-08-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-09
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-09-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-10
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-10-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-11
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-11-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-12
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-12-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-13
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-13-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-14
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-14-not
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-15
14 bit OUT FALSE hm2_5i25.0.7i66.0.0.input-15-not
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-00
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-01
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-02
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-03
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-04
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-05
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-06
14 bit IN FALSE hm2_5i25.0.7i66.0.0.output-07
14 s32 OUT 0 hm2_5i25.0.encoder.00.count
14 s32 OUT 0 hm2_5i25.0.encoder.00.count-latched
14 bit I/O FALSE hm2_5i25.0.encoder.00.index-enable
14 bit OUT FALSE hm2_5i25.0.encoder.00.input-a
14 bit OUT FALSE hm2_5i25.0.encoder.00.input-b
14 bit OUT TRUE hm2_5i25.0.encoder.00.input-index
14 bit IN FALSE hm2_5i25.0.encoder.00.latch-enable
14 bit IN FALSE hm2_5i25.0.encoder.00.latch-polarity
14 float OUT 0 hm2_5i25.0.encoder.00.position
14 float OUT 0 hm2_5i25.0.encoder.00.position-latched
14 bit OUT FALSE hm2_5i25.0.encoder.00.quad-error
14 bit IN FALSE hm2_5i25.0.encoder.00.quad-error-enable
14 s32 OUT 0 hm2_5i25.0.encoder.00.rawcounts
14 s32 OUT 0 hm2_5i25.0.encoder.00.rawlatch
14 bit IN FALSE hm2_5i25.0.encoder.00.reset
14 float OUT 0 hm2_5i25.0.encoder.00.velocity
14 float OUT 0 hm2_5i25.0.encoder.00.velocity-rpm
14 s32 OUT 0 hm2_5i25.0.encoder.01.count
14 s32 OUT 0 hm2_5i25.0.encoder.01.count-latched
14 bit I/O FALSE hm2_5i25.0.encoder.01.index-enable
14 bit OUT TRUE hm2_5i25.0.encoder.01.input-a
14 bit OUT TRUE hm2_5i25.0.encoder.01.input-b
14 bit OUT FALSE hm2_5i25.0.encoder.01.input-index
14 bit IN FALSE hm2_5i25.0.encoder.01.latch-enable
14 bit IN FALSE hm2_5i25.0.encoder.01.latch-polarity
14 float OUT 0 hm2_5i25.0.encoder.01.position
14 float OUT 0 hm2_5i25.0.encoder.01.position-latched
14 bit OUT FALSE hm2_5i25.0.encoder.01.quad-error
14 bit IN FALSE hm2_5i25.0.encoder.01.quad-error-enable
14 s32 OUT 0 hm2_5i25.0.encoder.01.rawcounts
14 s32 OUT 0 hm2_5i25.0.encoder.01.rawlatch
14 bit IN FALSE hm2_5i25.0.encoder.01.reset
14 float OUT 0 hm2_5i25.0.encoder.01.velocity
14 float OUT 0 hm2_5i25.0.encoder.01.velocity-rpm
14 bit IN FALSE hm2_5i25.0.encoder.hires-timestamp
14 u32 IN 0x00001FC8 hm2_5i25.0.encoder.sample-frequency
14 bit OUT TRUE hm2_5i25.0.gpio.000.in
14 bit OUT FALSE hm2_5i25.0.gpio.000.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.001.in
14 bit OUT FALSE hm2_5i25.0.gpio.001.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.002.in
14 bit OUT FALSE hm2_5i25.0.gpio.002.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.003.in
14 bit OUT FALSE hm2_5i25.0.gpio.003.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.004.in
14 bit OUT FALSE hm2_5i25.0.gpio.004.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.005.in
14 bit OUT FALSE hm2_5i25.0.gpio.005.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.006.in
14 bit OUT FALSE hm2_5i25.0.gpio.006.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.007.in
14 bit OUT FALSE hm2_5i25.0.gpio.007.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.008.in
14 bit OUT FALSE hm2_5i25.0.gpio.008.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.009.in
14 bit OUT FALSE hm2_5i25.0.gpio.009.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.010.in
14 bit OUT FALSE hm2_5i25.0.gpio.010.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.011.in
14 bit OUT FALSE hm2_5i25.0.gpio.011.in_not
14 bit OUT FALSE hm2_5i25.0.gpio.012.in
14 bit OUT TRUE hm2_5i25.0.gpio.012.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.013.in
14 bit OUT FALSE hm2_5i25.0.gpio.013.in_not
14 bit OUT FALSE hm2_5i25.0.gpio.014.in
14 bit OUT TRUE hm2_5i25.0.gpio.014.in_not
14 bit OUT FALSE hm2_5i25.0.gpio.015.in
14 bit OUT TRUE hm2_5i25.0.gpio.015.in_not
14 bit OUT FALSE hm2_5i25.0.gpio.016.in
14 bit OUT TRUE hm2_5i25.0.gpio.016.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.017.in
14 bit OUT FALSE hm2_5i25.0.gpio.017.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.018.in
14 bit OUT FALSE hm2_5i25.0.gpio.018.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.019.in
14 bit OUT FALSE hm2_5i25.0.gpio.019.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.020.in
14 bit OUT FALSE hm2_5i25.0.gpio.020.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.021.in
14 bit OUT FALSE hm2_5i25.0.gpio.021.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.022.in
14 bit OUT FALSE hm2_5i25.0.gpio.022.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.023.in
14 bit OUT FALSE hm2_5i25.0.gpio.023.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.024.in
14 bit OUT FALSE hm2_5i25.0.gpio.024.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.025.in
14 bit OUT FALSE hm2_5i25.0.gpio.025.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.026.in
14 bit OUT FALSE hm2_5i25.0.gpio.026.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.027.in
14 bit OUT FALSE hm2_5i25.0.gpio.027.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.028.in
14 bit OUT FALSE hm2_5i25.0.gpio.028.in_not
14 bit IN FALSE hm2_5i25.0.gpio.028.out
14 bit OUT TRUE hm2_5i25.0.gpio.029.in
14 bit OUT FALSE hm2_5i25.0.gpio.029.in_not
14 bit IN FALSE hm2_5i25.0.gpio.029.out
14 bit OUT TRUE hm2_5i25.0.gpio.030.in
14 bit OUT FALSE hm2_5i25.0.gpio.030.in_not
14 bit IN FALSE hm2_5i25.0.gpio.030.out
14 bit OUT TRUE hm2_5i25.0.gpio.031.in
14 bit OUT FALSE hm2_5i25.0.gpio.031.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.032.in
14 bit OUT FALSE hm2_5i25.0.gpio.032.in_not
14 bit OUT TRUE hm2_5i25.0.gpio.033.in
14 bit OUT FALSE hm2_5i25.0.gpio.033.in_not
14 bit IN FALSE hm2_5i25.0.led.CR01
14 bit IN FALSE hm2_5i25.0.led.CR02
14 bit IN FALSE hm2_5i25.0.pwmgen.00.enable
14 float IN 0 hm2_5i25.0.pwmgen.00.value
14 bit IN FALSE hm2_5i25.0.pwmgen.01.enable
14 float IN 0 hm2_5i25.0.pwmgen.01.value
14 s32 OUT 0 hm2_5i25.0.read.time
14 s32 OUT 0 hm2_5i25.0.read_gpio.time
14 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.fault-count
14 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state
14 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state2
14 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state3
14 bit IN TRUE hm2_5i25.0.sserial.port-0.run
14 bit IN FALSE hm2_5i25.0.stepgen.00.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.00.counts
14 float OUT 0 hm2_5i25.0.stepgen.00.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.00.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.00.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.00.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.00.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.00.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.00.enable
14 float IN 0 hm2_5i25.0.stepgen.00.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.00.position-fb
14 float IN 0 hm2_5i25.0.stepgen.00.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.00.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.01.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.01.counts
14 float OUT 0 hm2_5i25.0.stepgen.01.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.01.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.01.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.01.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.01.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.01.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.01.enable
14 float IN 0 hm2_5i25.0.stepgen.01.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.01.position-fb
14 float IN 0 hm2_5i25.0.stepgen.01.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.01.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.02.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.02.counts
14 float OUT 0 hm2_5i25.0.stepgen.02.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.02.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.02.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.02.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.02.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.02.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.02.enable
14 float IN 0 hm2_5i25.0.stepgen.02.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.02.position-fb
14 float IN 0 hm2_5i25.0.stepgen.02.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.02.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.03.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.03.counts
14 float OUT 0 hm2_5i25.0.stepgen.03.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.03.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.03.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.03.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.03.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.03.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.03.enable
14 float IN 0 hm2_5i25.0.stepgen.03.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.03.position-fb
14 float IN 0 hm2_5i25.0.stepgen.03.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.03.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.04.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.04.counts
14 float OUT 0 hm2_5i25.0.stepgen.04.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.04.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.04.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.04.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.04.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.04.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.04.enable
14 float IN 0 hm2_5i25.0.stepgen.04.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.04.position-fb
14 float IN 0 hm2_5i25.0.stepgen.04.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.04.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.05.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.05.counts
14 float OUT 0 hm2_5i25.0.stepgen.05.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.05.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.05.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.05.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.05.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.05.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.05.enable
14 float IN 0 hm2_5i25.0.stepgen.05.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.05.position-fb
14 float IN 0 hm2_5i25.0.stepgen.05.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.05.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.06.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.06.counts
14 float OUT 0 hm2_5i25.0.stepgen.06.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.06.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.06.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.06.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.06.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.06.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.06.enable
14 float IN 0 hm2_5i25.0.stepgen.06.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.06.position-fb
14 float IN 0 hm2_5i25.0.stepgen.06.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.06.velocity-fb
14 bit IN FALSE hm2_5i25.0.stepgen.07.control-type
14 s32 OUT 0 hm2_5i25.0.stepgen.07.counts
14 float OUT 0 hm2_5i25.0.stepgen.07.dbg_err_at_match
14 float OUT 0 hm2_5i25.0.stepgen.07.dbg_ff_vel
14 float OUT 0 hm2_5i25.0.stepgen.07.dbg_pos_minus_prev_cmd
14 float OUT 0 hm2_5i25.0.stepgen.07.dbg_s_to_match
14 s32 OUT 0 hm2_5i25.0.stepgen.07.dbg_step_rate
14 float OUT 0 hm2_5i25.0.stepgen.07.dbg_vel_error
14 bit IN FALSE hm2_5i25.0.stepgen.07.enable
14 float IN 0 hm2_5i25.0.stepgen.07.position-cmd
14 float OUT 0 hm2_5i25.0.stepgen.07.position-fb
14 float IN 0 hm2_5i25.0.stepgen.07.velocity-cmd
14 float OUT 0 hm2_5i25.0.stepgen.07.velocity-fb
14 bit I/O FALSE hm2_5i25.0.watchdog.has_bit
14 s32 OUT 0 hm2_5i25.0.write.time
14 s32 OUT 0 hm2_5i25.0.write_gpio.time
Pin Aliases:
Alias Original Name
Signals:
Type Value Name (linked to)
Parameters:
Owner Type Dir Value Name
14 u32 RO 0x00000000 hm2_5i25.0.7i66.0.0.analog0
14 u32 RO 0x00000000 hm2_5i25.0.7i66.0.0.analog1
14 u32 RO 0x00000000 hm2_5i25.0.7i66.0.0.analog2
14 u32 RO 0x00000000 hm2_5i25.0.7i66.0.0.analog3
14 u32 RO 0x76543210 hm2_5i25.0.7i66.0.0.biggercookie
14 u32 RO 0x00005540 hm2_5i25.0.7i66.0.0.fieldvoltage
14 u32 RW 0x00000009 hm2_5i25.0.7i66.0.0.nvbaudrate
14 u32 RO 0x14000002 hm2_5i25.0.7i66.0.0.nvunitnumber
14 u32 RW 0x00000032 hm2_5i25.0.7i66.0.0.nvwatchdogtimeout
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-00-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-01-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-02-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-03-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-04-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-05-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-06-invert
14 bit RW FALSE hm2_5i25.0.7i66.0.0.output-07-invert
14 u32 RO 0x0000000A hm2_5i25.0.7i66.0.0.swrevision
14 bit RW FALSE hm2_5i25.0.encoder.00.counter-mode
14 bit RW TRUE hm2_5i25.0.encoder.00.filter
14 bit RW FALSE hm2_5i25.0.encoder.00.index-invert
14 bit RW FALSE hm2_5i25.0.encoder.00.index-mask
14 bit RW FALSE hm2_5i25.0.encoder.00.index-mask-invert
14 float RW 1 hm2_5i25.0.encoder.00.scale
14 float RW 0.5 hm2_5i25.0.encoder.00.vel-timeout
14 bit RW FALSE hm2_5i25.0.encoder.01.counter-mode
14 bit RW TRUE hm2_5i25.0.encoder.01.filter
14 bit RW FALSE hm2_5i25.0.encoder.01.index-invert
14 bit RW FALSE hm2_5i25.0.encoder.01.index-mask
14 bit RW FALSE hm2_5i25.0.encoder.01.index-mask-invert
14 float RW 1 hm2_5i25.0.encoder.01.scale
14 float RW 0.5 hm2_5i25.0.encoder.01.vel-timeout
14 bit RW FALSE hm2_5i25.0.gpio.028.invert_output
14 bit RW FALSE hm2_5i25.0.gpio.028.is_opendrain
14 bit RW FALSE hm2_5i25.0.gpio.028.is_output
14 bit RW FALSE hm2_5i25.0.gpio.029.invert_output
14 bit RW FALSE hm2_5i25.0.gpio.029.is_opendrain
14 bit RW FALSE hm2_5i25.0.gpio.029.is_output
14 bit RW FALSE hm2_5i25.0.gpio.030.invert_output
14 bit RW FALSE hm2_5i25.0.gpio.030.is_opendrain
14 bit RW FALSE hm2_5i25.0.gpio.030.is_output
14 bit RW FALSE hm2_5i25.0.io_error
14 bit RW FALSE hm2_5i25.0.pwmgen.00.enable.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.00.enable.is_opendrain
14 bit RW FALSE hm2_5i25.0.pwmgen.00.offset-mode
14 bit RW FALSE hm2_5i25.0.pwmgen.00.out0.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.00.out0.is_opendrain
14 bit RW FALSE hm2_5i25.0.pwmgen.00.out1.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.00.out1.is_opendrain
14 s32 RW 1 hm2_5i25.0.pwmgen.00.output-type
14 float RW 1 hm2_5i25.0.pwmgen.00.scale
14 bit RW FALSE hm2_5i25.0.pwmgen.01.enable.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.01.enable.is_opendrain
14 bit RW FALSE hm2_5i25.0.pwmgen.01.offset-mode
14 bit RW FALSE hm2_5i25.0.pwmgen.01.out0.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.01.out0.is_opendrain
14 bit RW FALSE hm2_5i25.0.pwmgen.01.out1.invert_output
14 bit RW FALSE hm2_5i25.0.pwmgen.01.out1.is_opendrain
14 s32 RW 1 hm2_5i25.0.pwmgen.01.output-type
14 float RW 1 hm2_5i25.0.pwmgen.01.scale
14 u32 RW 0x00004E20 hm2_5i25.0.pwmgen.pdm_frequency
14 u32 RW 0x00004E20 hm2_5i25.0.pwmgen.pwm_frequency
14 s32 RW 0 hm2_5i25.0.read.tmax
14 bit RO FALSE hm2_5i25.0.read.tmax-increased
14 s32 RW 0 hm2_5i25.0.read_gpio.tmax
14 bit RO FALSE hm2_5i25.0.read_gpio.tmax-increased
14 bit RW FALSE hm2_5i25.0.sserial.00.tx0.invert_output
14 bit RW FALSE hm2_5i25.0.sserial.00.tx0.is_opendrain
14 bit RW FALSE hm2_5i25.0.sserial.00.txen0.invert_output
14 bit RW FALSE hm2_5i25.0.sserial.00.txen0.is_opendrain
14 u32 RW 0x00000001 hm2_5i25.0.sserial.port-0.fault-dec
14 u32 RW 0x0000000A hm2_5i25.0.sserial.port-0.fault-inc
14 u32 RW 0x000000C8 hm2_5i25.0.sserial.port-0.fault-lim
14 bit RW FALSE hm2_5i25.0.stepgen.00.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.00.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.00.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.00.maxvel
14 float RW 1 hm2_5i25.0.stepgen.00.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.00.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.00.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.01.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.01.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.01.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.01.maxvel
14 float RW 1 hm2_5i25.0.stepgen.01.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.01.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.01.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.02.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.02.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.02.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.02.maxvel
14 float RW 1 hm2_5i25.0.stepgen.02.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.02.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.02.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.03.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.03.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.03.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.03.maxvel
14 float RW 1 hm2_5i25.0.stepgen.03.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.03.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.03.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.04.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.04.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.04.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.04.maxvel
14 float RW 1 hm2_5i25.0.stepgen.04.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.04.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.04.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.05.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.05.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.05.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.05.maxvel
14 float RW 1 hm2_5i25.0.stepgen.05.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.05.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.05.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.06.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.06.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.06.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.06.maxvel
14 float RW 1 hm2_5i25.0.stepgen.06.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.06.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.06.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.table-data-3
14 bit RW FALSE hm2_5i25.0.stepgen.07.direction.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.07.direction.is_opendrain
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirhold
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirsetup
14 float RW 1 hm2_5i25.0.stepgen.07.maxaccel
14 float RW 0 hm2_5i25.0.stepgen.07.maxvel
14 float RW 1 hm2_5i25.0.stepgen.07.position-scale
14 bit RW FALSE hm2_5i25.0.stepgen.07.step.invert_output
14 bit RW FALSE hm2_5i25.0.stepgen.07.step.is_opendrain
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.step_type
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.steplen
14 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.stepspace
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-0
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-1
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-2
14 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.table-data-3
14 u32 RW 0x004C4B40 hm2_5i25.0.watchdog.timeout_ns
14 s32 RW 0 hm2_5i25.0.write.tmax
14 bit RO FALSE hm2_5i25.0.write.tmax-increased
14 s32 RW 0 hm2_5i25.0.write_gpio.tmax
14 bit RO FALSE hm2_5i25.0.write_gpio.tmax-increased
Parameter Aliases:
Alias Original Name
hm2_5i25.0.pwmgen.00.enable.invert_output hm2_5i25.0.gpio.009.invert_output
hm2_5i25.0.pwmgen.00.enable.is_opendrain hm2_5i25.0.gpio.009.is_opendrain
hm2_5i25.0.pwmgen.00.out0.invert_output hm2_5i25.0.gpio.008.invert_output
hm2_5i25.0.pwmgen.00.out0.is_opendrain hm2_5i25.0.gpio.008.is_opendrain
hm2_5i25.0.pwmgen.00.out1.invert_output hm2_5i25.0.gpio.010.invert_output
hm2_5i25.0.pwmgen.00.out1.is_opendrain hm2_5i25.0.gpio.010.is_opendrain
hm2_5i25.0.pwmgen.01.enable.invert_output hm2_5i25.0.gpio.026.invert_output
hm2_5i25.0.pwmgen.01.enable.is_opendrain hm2_5i25.0.gpio.026.is_opendrain
hm2_5i25.0.pwmgen.01.out0.invert_output hm2_5i25.0.gpio.025.invert_output
hm2_5i25.0.pwmgen.01.out0.is_opendrain hm2_5i25.0.gpio.025.is_opendrain
hm2_5i25.0.pwmgen.01.out1.invert_output hm2_5i25.0.gpio.027.invert_output
hm2_5i25.0.pwmgen.01.out1.is_opendrain hm2_5i25.0.gpio.027.is_opendrain
hm2_5i25.0.sserial.00.tx0.invert_output hm2_5i25.0.gpio.011.invert_output
hm2_5i25.0.sserial.00.tx0.is_opendrain hm2_5i25.0.gpio.011.is_opendrain
hm2_5i25.0.sserial.00.txen0.invert_output hm2_5i25.0.gpio.012.invert_output
hm2_5i25.0.sserial.00.txen0.is_opendrain hm2_5i25.0.gpio.012.is_opendrain
hm2_5i25.0.stepgen.00.direction.invert_output hm2_5i25.0.gpio.000.invert_output
hm2_5i25.0.stepgen.00.direction.is_opendrain hm2_5i25.0.gpio.000.is_opendrain
hm2_5i25.0.stepgen.00.step.invert_output hm2_5i25.0.gpio.001.invert_output
hm2_5i25.0.stepgen.00.step.is_opendrain hm2_5i25.0.gpio.001.is_opendrain
hm2_5i25.0.stepgen.01.direction.invert_output hm2_5i25.0.gpio.002.invert_output
hm2_5i25.0.stepgen.01.direction.is_opendrain hm2_5i25.0.gpio.002.is_opendrain
hm2_5i25.0.stepgen.01.step.invert_output hm2_5i25.0.gpio.003.invert_output
hm2_5i25.0.stepgen.01.step.is_opendrain hm2_5i25.0.gpio.003.is_opendrain
hm2_5i25.0.stepgen.02.direction.invert_output hm2_5i25.0.gpio.004.invert_output
hm2_5i25.0.stepgen.02.direction.is_opendrain hm2_5i25.0.gpio.004.is_opendrain
hm2_5i25.0.stepgen.02.step.invert_output hm2_5i25.0.gpio.005.invert_output
hm2_5i25.0.stepgen.02.step.is_opendrain hm2_5i25.0.gpio.005.is_opendrain
hm2_5i25.0.stepgen.03.direction.invert_output hm2_5i25.0.gpio.006.invert_output
hm2_5i25.0.stepgen.03.direction.is_opendrain hm2_5i25.0.gpio.006.is_opendrain
hm2_5i25.0.stepgen.03.step.invert_output hm2_5i25.0.gpio.007.invert_output
hm2_5i25.0.stepgen.03.step.is_opendrain hm2_5i25.0.gpio.007.is_opendrain
hm2_5i25.0.stepgen.04.direction.invert_output hm2_5i25.0.gpio.017.invert_output
hm2_5i25.0.stepgen.04.direction.is_opendrain hm2_5i25.0.gpio.017.is_opendrain
hm2_5i25.0.stepgen.04.step.invert_output hm2_5i25.0.gpio.018.invert_output
hm2_5i25.0.stepgen.04.step.is_opendrain hm2_5i25.0.gpio.018.is_opendrain
hm2_5i25.0.stepgen.05.direction.invert_output hm2_5i25.0.gpio.019.invert_output
hm2_5i25.0.stepgen.05.direction.is_opendrain hm2_5i25.0.gpio.019.is_opendrain
hm2_5i25.0.stepgen.05.step.invert_output hm2_5i25.0.gpio.020.invert_output
hm2_5i25.0.stepgen.05.step.is_opendrain hm2_5i25.0.gpio.020.is_opendrain
hm2_5i25.0.stepgen.06.direction.invert_output hm2_5i25.0.gpio.021.invert_output
hm2_5i25.0.stepgen.06.direction.is_opendrain hm2_5i25.0.gpio.021.is_opendrain
hm2_5i25.0.stepgen.06.step.invert_output hm2_5i25.0.gpio.022.invert_output
hm2_5i25.0.stepgen.06.step.is_opendrain hm2_5i25.0.gpio.022.is_opendrain
hm2_5i25.0.stepgen.07.direction.invert_output hm2_5i25.0.gpio.023.invert_output
hm2_5i25.0.stepgen.07.direction.is_opendrain hm2_5i25.0.gpio.023.is_opendrain
hm2_5i25.0.stepgen.07.step.invert_output hm2_5i25.0.gpio.024.invert_output
hm2_5i25.0.stepgen.07.step.is_opendrain hm2_5i25.0.gpio.024.is_opendrain
Exported Functions:
Owner CodeAddr Arg FP Users Name
00014 7ff51dc678b5 55713968ba70 YES 0 hm2_5i25.0.read
00014 7ff51dc67606 55713968ba70 YES 0 hm2_5i25.0.read_gpio
00014 7ff51dc67709 55713968ba70 YES 0 hm2_5i25.0.write
00014 7ff51dc676d4 55713968ba70 YES 0 hm2_5i25.0.write_gpio
Realtime Threads:
Period FP Name ( Time, Max-Time )На 7i78 аналоговый выход сделан в виде "изолированного потенциометра". Что это значит. Это значит, что на выводы SPINDLE + и SPINDLE- необходимо подать напряжение, а далее с выхода SPINDLE OUT может быть снято напряжение в диапазоне поданного для управления шпинделем. Выводы 5i25 в данном случае - PWM, их два, судя по картинке, что я постил ранее, но это не суть. Важно, что управление вот таким образом.vko писал(а): ↑13 сен 2023, 19:08 В процессе настройки появился вопрос по подключению шпинделя. А именно его аналоговое управление через 7i78. Подключаю на ножки 18 ТВ2 (SPINDLE OUT) и 9 ТВ2 (GND) и не могу понять как прописать hal файл в части связать net spindle-cmd и аналоговый выход на 7i78. на связке 5i25 + 7i77 было просто net spindle-cmd hm2_5i25.0.7i77.0.1.analogout5 и все, а тут я даже сигналов analogout не вижу. Может они не так в данном случае называются.
hm2/hm2_5i25.0: IO Pin 008 (P3-05): PWMGen #0, pin Out0 (PWM or Up) (Output)
hm2/hm2_5i25.0: IO Pin 009 (P3-06): PWMGen #0, pin Not-Enable (Output)
hm2/hm2_5i25.0: IO Pin 010 (P3-07): PWMGen #0, pin Out1 (Dir or Down) (Output)
Какой из них выходит на 7i78 я не могу сказать, возможно, что первый. Надо методом научного тыка проверить.hm2/hm2_5i25.0: IO Pin 025 (P2-05): PWMGen #1, pin Out0 (PWM or Up) (Output)
hm2/hm2_5i25.0: IO Pin 026 (P2-06): PWMGen #1, pin Not-Enable (Output)
hm2/hm2_5i25.0: IO Pin 027 (P2-07): PWMGen #1, pin Out1 (Dir or Down) (Output)
Таким образом, касаемо шпинделя в нем только три сигнала, на 5, 6 и 7 контактах соответственно.DB25 PIN GPIO FUNCT DIR DB25 PIN GPIO FUNC DIR
1 IO0 DIR0 OUT 14 IO1 STEP0 OUT
2 IO2 DIR1 OUT 15 IO3 STEP1 OUT
3 IO4 DIR2 OUT 16 IO5 STEP2 OUT
4 IO6 DIR3 OUT 17 IO7 STEP3 OUT
5 IO8 /SPINPWM OUT 18 GND
6 IO9 /SPINENA OUT 19 GND
7 IO10 SPINDIR OUT 20 GND
8 IO11 SSTX OUT 21 GND
9 IO12 /SSTXEN OUT 22 GND or 5V
10 IO13 SSRX IN 23 GND or 5V
11 IO14 QUADI IN 24 GND or 5V
12 IO15 QUADB IN 25 GND or 5V
13 IO16 QUADA IN
SPINDLE INTERFACE
The 7I78 provides one analog output for spindle control. The analog output is a
isolated potentiometer replacement type device. It functions like a potentiometer with
SPINDLE + being one end of the potentiometer, SPINDLE OUT being the wiper and
SPINDLE- being the other end. The voltage on SPINDLE OUT can be set to any voltage
between SPINDLE- and SPINDLE+. Polarity and voltage range must always be observed
for proper operation. The voltage supplied between SPINDLE+ and SPINDLE- must be
between 5VDC an 15VDC with SPINDLE + always being more positive than SPINDLE-.
Because the analog output is isolated, bipolar output is possible, for example with
SPINDLE+ connected to 5V and SPINDLE- connected to -5V, a +-5V analog output range
is created. In this case the spindle output must be offset so that 50% of full scale is output
when a 0V output is required. Note that if bipolar output is used, the output will be forced
to SPINDLE- at startup or when SPINENA is false.
Spindle PWM is active low so if the 7I78 is used with HostMot2 firmware, the PWM
output must be inverted.
SPINDLE ISOLATED OUTPUTS
The 7I78 provides 2 isolated outputs for use for spindle direction control, and
spindle enable. These outputs are OPTO coupler Darlington transistors. They are all
isolated from one another so can be used for pull up or pull-down individually. They will
switch a maximum of 50 mA at 0 to 100 VDC. The SPINDLE ENA output is special as it
uses the same signal that enables the analog output. When the analog output is enabled,
the SPINDLE ENA OPTO output is on.
Уже создавал конфигурацию с 7i76 там сигналы примерно такие же как и на 7i77xenon-alien писал(а): ↑13 сен 2023, 21:46 Всё что я могу посоветовать, это создать конфигурацию станка 5i25 + 7i76 и посмотреть как там всё устроено.
7i96S там .pwmgen. (можете и для неё сделать конфиг и подставить уже свои имена)
Лично я не пользовался, но есть Mesa Configuration Tool. Человек с офф. форума сделал отдельный конфигуратор, может там что-то найдёте.